Field
Various features relate to an integrated device that includes a capacitor, and more specifically to a capacitor that includes multiple pins and at least one pin that traverses a plate of the capacitor.
Background
FIG. 1 illustrates a configuration of an integrated device that includes a die. Specifically, FIG. 1 illustrates an integrated device 100 that includes a first die 102 and a package substrate 106. The package substrate 106 includes a dielectric layer and a plurality of interconnects 110. The package substrate 106 is a laminated substrate. The plurality of interconnects 110 includes traces, pads and/or vias. The first die 102 is coupled to the package substrate 106 through a first plurality of solder balls 112. The package substrate 106 is coupled to a printed circuit board (PCB) 108 through a second plurality of solder balls 116. FIG. 1 illustrates that a capacitor 120 is mounted on the PCB 108. The capacitor 120 is located externally of the integrated device 100, and takes up a lot real estate on the PCB 108.
A drawback of the capacitor 120 shown in FIG. 1 is that it creates a device with a form factor that may be too large for the needs of mobile computing devices and/or wearable computing devices. This may result in a device that is either too large and/or too thick. That is, the combination of the integrated device 100, the capacitor 120 and the PCB 108 shown in FIG. 1 may be too thick and/or have a surface area that is too large to meet the needs and/or requirements of mobile computing devices and/or wearable computing devices.
Therefore, there is a need for an integrated device that includes a compact form factor, while at the same time meeting the needs and/or requirements of mobile devices, Internet of Things (IoT) devices, computing devices and/or wearable computing devices.